Radio frequency (RF) power amplifiers (PAs) are used to produce higher output power levels for signals transmitted by wireless devices, such as cellular telephone handsets. For these RF PAs, there are often a number of parameters that are set during manufacture in order to achieve optimum performance of the PA. For example, some RF PAs include multiple tuned amplifier stages. For optimum performance, the tuning of these stages must be set correctly. In addition to the settings for the tuning of these amplifier stages, it is also important to properly set the bias conditions for each of these amplifier stages.
FIG. 1 (Prior Art) is a block diagram for an embodiment 100 of multiple amplifier stages for a PA utilizing fixed tuning/biasing parameters. An RF input (RFIN) 101 is received by an input match network 102 and then provided to multiple amplifier stages before being provided to the output match network 104. The output match network 104 provides the RF output (RFOUT) 105 that is ultimately provided as a transmit signal to an antenna. As depicted, there are three amplifier stages. The first stage (STAGE 1) 106 receives an RF input from the input match network 102 and provides an output to the second stage (STAGE 2) 108. In turn, the second stage (STAGE 2) 108 receives the signal from the first stage (STAGE 1) 106 and provides an output to the third stage (STAGE 3) 110. Finally, the third stage (STAGE 3) 110 receives the signal from the second stage (STAGE 2) 108 and provides an output to the output match network 104.
As indicated above, multiple tuned circuits and bias regulators are typically associated with the multiple amplifier stages of a traditional PA. As depicted, a first tuned circuit 112 is coupled to node 113 between the output of the first stage (STAGE 1) 106 and the input of the second stage (STAGE 2) 108. And a second tuned circuit 114 is coupled to node 115 between the output of the second stage (STAGE 2) 108 and the input of the third stage (STAGE 3) 110. In addition, a first bias regulator (BIAS1) 122 is coupled to provide bias conditions to the first stage (STAGE 1) 106. A second bias regulator (BIAS2) 124 is coupled to provide bias conditions to the second stage (STAGE 2) 108. And a third bias regular (BIAS3) 126 is coupled to provide bias conditions to the third stage (STAGE 3) 110. The tuned circuits 112 and 114 and bias regulators 122, 124 and 126 are configured with fixed parameters during fabrication of the PA to achieve optimum performance by the PA once manufactured.
Although these tuning/bias settings are helpful in improving the performance of the PA, problems arise due to inconsistencies in the manufacturing process between different PA parts. Because the tuning and biasing of the amplifier stages are fixed for the PA design during fabrication, these manufacturing process variations from part to part result in PA performance variations from part to part. These performance variations can result in significant yield loss if the manufacturing process variations are large enough. In addition, these manufacturing process variations can make it difficult to determine the proper settings during the design cycle of PAs, because these design cycles can generally require many revisions as these tuning/biasing parameters are modified and tweaked to obtain optimum performance.
In recent years, one-time-programmable (OTP) memory cells have become available in many standard CMOS processes. For examples, suppliers such as Kilopass and Ememory have OTP memory cells from 16 bits to hundreds of kilo-bits that can be embedded into CMOS designs. As such, analog and digital CMOS designs have been able to taken advantage of OTP memories to allow one-time factoring trimming of CMOS integrated circuit designs. However, these OTP memories have not before been used with RF power amplifiers.